Versatile radio receiver architecture
US9918310B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | May 26, 2016 |
| Grant date | Mar 13, 2018 |
| Priority date | — |
| Expiry date | May 26, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L5/0078
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
An RF receiver comprises a down-converting and sampling circuit (104) adapted to: receive an RF input signal (RFIN) having a signal band (BWRF) comprising a plurality of sub-bands (BWIF), each sub-band comprising a plurality (2K) of channels separated by frequency channel spaces (ΔfCH); and perform frequency transposition and sampling to generate a discrete time signal in which a selected one of the plurality of sub-bands is brought from an initial frequency band to a lower frequency band (IF20±KΔfCH); and a discrete time filter (108) having a variable pass band, the central frequency (f0) of the discrete time filter being controllable to select any one of the plurality (2K) of channels of the selected sub-band.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.