Method for manufacturing TFT substrate and structure thereof
US9923002B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | May 9, 2017 |
| Grant date | Mar 20, 2018 |
| Priority date | — |
| Expiry date | May 9, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10K59/8723
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A TFT substrate includes a base plate on which first and second gate electrodes respectively corresponding to first and second TFTs are formed. A gate insulation layer, a semiconductor layer, and an etch stop layer are sequentially formed on the base plate and the first and second electrodes. A single photolithographic process is conducted simultaneously on the gate insulation layer, the semiconductor layer, and the etch stop layer with the same gray tone mask to form separate semiconductor portions for the two TFTs and also form contact holes in the etch stop layer and the gate insulation layer to receive sources and drains of the two TFTs to be deposited therein and in contact with the two semiconductor portions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.