PCB connector footprint
US9923309B1 · kind B1 · utility
Assignees
Inventors
Key dates
| Filing date | Jan 27, 2017 |
| Grant date | Mar 20, 2018 |
| Priority date | — |
| Expiry date | Jan 27, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2201/10303
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A PCB includes a substrate having a connector surface with a PCB connector footprint defined along a longitudinal axis and a lateral axis and subdivided into PCB column grouping footprints extending generally parallel to the longitudinal axis. The PCB includes signal vias arranged in pairs along a signal pair axis with a plurality of pairs of signal vias in each PCB column grouping footprint. The signal pair axis is non-parallel to the longitudinal axis, non-parallel to the lateral axis and intersects the longitudinal axis at a lesser angle than the signal pair axis intersects the lateral axis. The PCB includes ground vias at least partially through the substrate. The ground vias are arranged around each of the pairs of signal vias to provide electrical shielding around each of the pairs of signal vias.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.