Method for reducing power consumption of memory system, and memory controller
US9927860B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 13, 2015 |
| Grant date | Mar 27, 2018 |
| Priority date | — |
| Expiry date | Apr 26, 2035 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D30/50
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for reducing power consumption of a memory system and a memory controller are provided. The method for reducing power consumption of a memory system includes: determining whether a dynamic random access memory DRAM memory module with a low access frequency exists in a memory system; when a DRAM memory module with a low access frequency exists, transfer, according to a size of a working set in the memory system, page data that does not belong to the working set to a non-volatile memory NVM memory module, where the page data that does not belong to the working set is page data that does not need to be accessed when a process runs within preset time.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.