Array substrate and fabrication method thereof, and display panel
US9929184B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 14, 2014 |
| Grant date | Mar 27, 2018 |
| Priority date | — |
| Expiry date | Nov 14, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/441
Abstract
An array substrate and a fabrication method thereof, and a display panel are provided. The array substrate includes a thin film transistor, and the fabrication method includes: forming an intermediate pattern; forming a pattern including a source electrode and a drain electrode of the thin film transistor, the source electrode of the thin film transistor being located on a source electrode ohmic contact region, and the drain electrode of the thin film transistor being located on a drain electrode ohmic contact region; forming a transparent electrode material layer, the transparent electrode material layer covering a substrate including the pattern of the source electrode and the drain electrode of the thin film transistor; patterning the transparent electrode material layer, to obtain a pattern including the pixel electrode; and patterning the intermediate pattern, to remove a channel ohmic contact region, and to remove a portion of a material of the channel active pattern region, so as to form an active layer of the thin film transistor and avoid effectively the residue 10a of the transparent electrode material or an organic matter left on the channel active pattern region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.