Integrated circuit and method for manufacturing integrated circuit
US9929206B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 23, 2016 |
| Grant date | Mar 27, 2018 |
| Priority date | — |
| Expiry date | Jun 23, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01J2003/1226
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
An integrated circuit for an imaging device including an array of photo-sensitive areas is disclosed. In one aspect the integrated circuit includes a first multi-layer structure and a second multi-layer structure arranged over a first and a second photo-sensitive area, respectively. The second multi-layer structures each have a bottom and a top reflective structure and a spacer layer arranged therebetween. The spacer layer has a thickness such that the multi-layer structure selectively transmits a narrow range of wavelengths of electro-magnetic radiation. The bottom and top reflective structures include a stack of alternating layers of a first and a second material. Thickness and/or material of the alternating layers of the first multi-layer structure differ from thickness and/or material of the alternating layers of the second multi-layer structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.