Patent · US Active

Shared resource digital signal processors

US9934195B2 · kind B2 · utility

0Cited by

7References

12Claims

0Family size

Assignee

Mediatek Sweden AB · SE

Inventors

Anders Nilsson · Helsingborg, SE
Eric Tell · Säter, SE

Key dates

Filing date	Nov 28, 2012
Grant date	Apr 3, 2018
Priority date	—
Expiry date	Sep 18, 2033

Classification

Technology area (CPC G)Physics
CPC primaryG06F9/3891
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

A multicore processor is achieved by a processor assembly, comprising a first processor having a first core and at least a first and a second unit, each being selected from the group of vector execution units, memory units and accelerators, said first core and first and second units being interconnected by a first network, and a second processor having a second core wherein the first core is arranged to enable the second core to control at least one of the units in the first processor. Each processors generally comprises a combination of execution units, memory units and accelerators, which may be controlled and/or accessed by units in the other processor.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.