Short circuit reduction in an electronic component comprising a stack of layers arranged on a flexible substrate
US9934836B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 21, 2012 |
| Grant date | Apr 3, 2018 |
| Priority date | — |
| Expiry date | Jul 1, 2034 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49155
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An electronic component (1) and an electronic device (100) comprising one or more such components (1). The electronic component (1) comprises a stack (4) of layers arranged on a flexible substrate (3). Said stack comprises an electrically active part (4a) and a protective layer (11) for protecting the electrically active part against scratches and abrasion. Said electrically active part comprises a bottom electrode layer (5) and a top electrode layer (9) and at least one insulating or semi-insulating layer (7) between said electrodes. The stack further comprises a buffer layer (13), arranged between the top electrode layer (9) and the protective layer (11). The buffer layer (13) is adapted for at least partially absorbing a lateral dimensional change (ΔL) occurring in the protective layer (11) and thus preventing said dimensional change (ΔL) from being transferred to the electrically active part (4a), thereby reducing the risk of short circuit to occur between the electrodes.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.