Asymmetrically selecting memory elements
US9934849B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 25, 2014 |
| Grant date | Apr 3, 2018 |
| Priority date | — |
| Expiry date | Jul 25, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2213/72
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system for asymmetrically selecting a memory element is described. The system includes a number of memory cells in a crossbar array. Each memory cell includes a memory element to store information. The memory element is defined as an intersection between a column electrode and a row electrode of the crossbar array. Each memory cell also includes a selector to select a target memory element by relaying a first selecting voltage to a column electrode that corresponds to the target memory element and relaying a second selecting voltage to a row electrode that corresponds to the target memory element. The system also includes a controller to pass a first standing voltage to column electrodes of the crossbar array and to pass a second standing voltage to row electrodes of the crossbar array. The first standing voltage is different than the second standing voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.