Multi-stacked device having TSV structure
US9935037B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 18, 2017 |
| Grant date | Apr 3, 2018 |
| Priority date | — |
| Expiry date | Jan 18, 2037 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02E10/52
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A multi-stacked device includes a lower device having a lower substrate, a first insulating layer on the lower substrate, and a through-silicon-via (TSV) pad on the first insulating layer, an intermediate device having an intermediate substrate, a second insulating layer on the intermediate substrate, and a first TSV bump on the second insulating layer, an upper device having an upper substrate, a third insulating layer on the upper substrate, a second TSV bump on the third insulating layer, and a TSV structure passing through the upper substrate, the third insulating layer, the second insulating layer, and the intermediate substrate to be connected to the first TSV bump, the second TSV bump, and the TSV pad. An insulating first TSV spacer between the intermediate substrate and the TSV structure and an insulating second TSV spacer between the upper substrate and the TSV structure are spaced apart along a stacking direction.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.