Radio frequency transistor stack with improved linearity
US9935092B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 19, 2015 |
| Grant date | Apr 3, 2018 |
| Priority date | — |
| Expiry date | Jun 19, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/85
Abstract
A RF transistor stack is described. The RF transistor stack comprises a first transistor having a T-gate layout configuration. The first transistor has a body region; a plurality of drain regions; and a plurality of source regions. A second transistor is provided which has a T-gate layout configuration. The second transistor has a body region; a plurality of drain regions; and a plurality of source regions. An interconnect operably couples the source regions of the first transistor with the source regions of the second transistor such that the distortion due to asymmetry in the division of RF voltage between the drain to source and the source to body terminals of first transistor is cancelled by reversing the asymmetry in the division of the RF voltage in the second transistor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.