Control circuit of thin film transistor
US9935127B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 21, 2015 |
| Grant date | Apr 3, 2018 |
| Priority date | — |
| Expiry date | Oct 26, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/451
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A control circuit of a thin film transistor, comprising: a substrate; a silicon nitride layer disposed on the substrate; a silicon dioxide layer disposed on the silicon nitride layer; a light shielding layer disposed inside the silicon nitride layer, which comprising a first light shielding region and a second light shielding region; at least one N type metal oxide semiconductor disposed on the silicon dioxide layer at a position corresponding to the first light shielding region; at least one P type metal oxide semiconductor disposed on the silicon dioxide layer at a position corresponding to the second light shielding region; each of the N type metal oxide semiconductor and the P type metal oxide semiconductor has a gate electrode layer, a first control signal received by voltage pulses of the gate electrode layer synchronized with a second control signal received by the light shielding layer in voltage variation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.