RLS-DCD adaptation hardware accelerator for interference cancellation in full-duplex wireless systems
US9935615B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 22, 2015 |
| Grant date | Apr 3, 2018 |
| Priority date | — |
| Expiry date | Apr 1, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04B1/525
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An adaptation hardware accelerator comprises a calculation unit to receive inputs at predefined time interval(s) that correspond to a calculation iteration, the inputs associated with adaptive filters having taps, and determine correlation and cross-correlation data based thereon for a given iteration. The correlation data comprises a correlation matrix. Determining the matrix comprises determining submatrices in an upper triangular portion and a diagonal portion of the matrix. The accelerator comprises an adaptation core unit to determine adaptive weights associated with the adaptive filters, respectively, based on an adaptive algorithm, utilizing the correlation and cross correlation data. The accelerator unit comprises a convergence detector unit to determine a convergence parameter; and a controller to generate an iteration signal for each time interval based on the parameter. The iteration signal communicates to continue or conclude; the conclusion indicates determination of a final value of adaptive weights by the core unit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.