Memory controller and method of operating a memory controller
US9940186B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 22, 2015 |
| Grant date | Apr 10, 2018 |
| Priority date | — |
| Expiry date | Dec 22, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/3452
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory controller includes a transaction interface arranged to be coupled to a transaction interconnect to receive a write transaction comprising write data, a mode controller arranged to obtain context information and to select a data protection scheme out of a plurality of data protection schemes based on the obtained context information, at least one data protection module to apply the selected data protection scheme by generating one or more protection code sequences from at least the write data in accordance with the selected data protection scheme, and a physical memory interface coupled to at least one memory device to store the write data and the one or more protection code sequences in the at least one memory device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.