Zoning of logical to physical data address translation tables with parallelized log list replay
US9940261B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 5, 2016 |
| Grant date | Apr 10, 2018 |
| Priority date | — |
| Expiry date | May 5, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/7208
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An example device includes a memory device and one or more processors. The memory device is configured to store a table that includes two or more mappings, each mapping being associated with a respective logical address and a respective physical address. The processors are configured to identify, within the table, a first zone and a second zone. Each zone includes one or more mappings of the table. The zones do not share any mapping of the table. The processors are further configured to form a first log list indicating one or more mapping updates associated with the mapping(s) included in the first zone, to form a second log list indicating one or more mapping updates associated with the mapping(s) included in the second zone, and to replay a portion of the first log list and a portion of the second log list concurrently to update the table.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.