Wafer-to-wafer bonding structure
US9941243B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 24, 2017 |
| Grant date | Apr 10, 2018 |
| Priority date | — |
| Expiry date | Jan 24, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/365
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A wafer-to-wafer bonding structure includes a first wafer including a first conductive pad in a first insulating layer and a first barrier layer surrounding a lower surface and side surfaces of the first conductive pad, a second wafer including a second conductive pad in a second insulating layer and a second barrier layer surrounding a lower surface and side surfaces of the second conductive pad, the second insulating layer being bonded to the first insulating layer, and at least a portion of an upper surface of the second conductive pad being partially or entirely bonded to at least a portion of an upper surface of the first conductive pad, and a third barrier layer between portions of the first and second wafers where the first and second conductive pads are not bonded to each other.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.