Patent · US Active

Nonvolatile storage device and method of controlling the same

US9947396B2 · kind B2 · utility

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9Claims
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Assignee

Inventors

Key dates

Filing dateAug 9, 2013
Grant dateApr 17, 2018
Priority date
Expiry dateAug 9, 2033

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG11C2213/82
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

To improve a reading speed and a writing speed while preventing occurrence of disturbance in a resistance storage element, specifically, a nonvolatile storage device that has a memory having at least one nonvolatile resistance storage element and a control unit configured to write a high resistance state or a low resistance state to the resistance storage element, wherein the control unit applies a bias to the resistance storage element in a verification operation carried out after writing the high resistance state, or applies a bias to the resistance storage element in a verification operation carried out after writing the low resistance state, these biases being in directions opposite to each other.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.