Three-dimensional semiconductor device
US9947684B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 19, 2016 |
| Grant date | Apr 17, 2018 |
| Priority date | — |
| Expiry date | Aug 31, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B43/50
Abstract
A semiconductor device includes a substrate including a cell region and a connection region. A stack is disposed on the substrate. A vertical channel structure penetrates the stack in the cell region. The stack includes electrode patterns and insulating patterns which are alternatingly and repeatedly stacked on the substrate. Each of the electrode patterns may extend in a first direction and include a pad portion. The pad portion is positioned in the connection region. The pad portion includes a first sidewall and a second sidewall that extend in the first direction on opposite sides of the pad portion. The first sidewall has a recessed portion that is recessed in a second direction crossing the first direction toward the second sidewall.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.