Low temperature polycrystalline silicon TFT array substrate and method of producing the same, display apparatus

US9947697B2 · kind B2 · utility

Assignee

• BOE Technology Group Co., Ltd. · CN

Inventors

• Chunping Long · Beijing, CN
• Yinan Liang · Beijing, CN
• Zheng Liu · Beacon Falls, US
• Zuqiang Wang · Beijing, CN
• Xueyan Tian · Beijing, CN

Key dates

• Filing date: Sep 30, 2014
• Grant date: Apr 17, 2018
• Expiry date: Jun 17, 2035

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10K59/1213

Abstract

The present disclosure provides a low temperature polycrystalline silicon field effect TFT array substrate and a method for producing the same and a display apparatus. The method: using a stepped photo resist process to form a polycrystalline silicon active layer and a lower polar plate of a polycrystalline silicon storage capacitor simultaneously on a substrate in one lithographic process; forming a gate insulation layer on the polycrystalline silicon active layer and the lower polar plate of the polycrystalline silicon storage capacitor; forming a metal layer on the gate insulation layer and etching the metal layer to form a gate electrode and gate lines connected with the gate electrode, a source electrode, a drain electrode and data lines connected with the source electrode and the drain electrode; forming a passivation layer, a photo resist layer and a pixel electrode layer in sequence and patterning the passivation layer, the photo resist layer and the pixel electrode layer to form patterns of an interlayer insulation layer via hole and a pixel electrode in one lithographic process; forming a pixel definition layer on the pixel electrode. The present disclosure may reduce tim…