Patent · US Active

Forming silicide regions and resulting MOS devices

US9947758B2 · kind B2 · utility

0Cited by
37References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateOct 18, 2016
Grant dateApr 17, 2018
Priority date
Expiry dateOct 18, 2036

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D84/038

Abstract

A semiconductor device with improved roll-off resistivity and reliability are provided. The semiconductor device includes a gate dielectric overlying a semiconductor substrate, a gate electrode overlying the gate dielectric, a gate silicide region on the gate electrode, a source/drain region adjacent the gate dielectric, and a source/drain silicide region on the source/drain region, wherein the source/drain silicide region and the gate silicide region have different metal compositions.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.