Hybrid chip comprising hybrid connector
US9948301B2 · kind B2 · utility
1Cited by
5References
18Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 15, 2016 |
| Grant date | Apr 17, 2018 |
| Priority date | — |
| Expiry date | Jul 15, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D89/60
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An integrated circuit (IC), a method of testing the IC, and a method of manufacturing the IC are provided. The IC includes analog circuitry, digital circuitry, at least one first connector, and a switching unit operatively coupled with the at least one first connector and configured to, if a first signal is received, couple the analog circuitry and the at least one first connector, and, if a second signal is received, couple the digital circuitry and the at least one first connector.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.