Deterministic current based frequency optimization of processor chip
US9952651B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 31, 2015 |
| Grant date | Apr 24, 2018 |
| Priority date | — |
| Expiry date | Jul 31, 2035 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system for adjusting a frequency of a processor is disclosed herein. The system includes a processor and a memory, where the memory includes a program configured to adjust a frequency of a multi-core processor. The operations include determining a total current and a temperature of the multi-core processor and estimating a leakage current for the multi-core processor. The operations also include calculating a switching current by subtracting the leakage current from the total current and calculating an effective switching capacitance based at least in part on the switching current. The operations also include calculating a workload activity factor by dividing the effective switching capacitance by a predetermined effective switching capacitance stored in vital product data, and enforcing a turbo frequency limit of the multi-core processor based on the workload activity factor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.