Instruction to load data up to a dynamically determined memory boundary
US9952862B2 · kind B2 · utility
0Cited by
47References
11Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 24, 2016 |
| Grant date | Apr 24, 2018 |
| Priority date | — |
| Expiry date | May 24, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/452
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A Load to Block Boundary instruction is provided that loads a variable number of bytes of data into a register while ensuring that a specified memory boundary is not crossed. The boundary is dynamically determined based on a specified type of boundary and one or more characteristics of the processor executing the instruction, such as cache line size or page size used by the processor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.