Semiconductor structure and manufacturing method thereof
US9953936B2 · kind B2 · utility
5Cited by
0References
14Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 30, 2015 |
| Grant date | Apr 24, 2018 |
| Priority date | — |
| Expiry date | Jun 23, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/18162
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor structure includes a transceiver configured to communicate with a device, a molding surrounding the transceiver, a via extending through the molding, an insulating layer disposed over the molding, the via and the transceiver, and a redistribution layer (RDL) disposed over the insulating layer and comprising an antenna and a dielectric layer surrounding the antenna, wherein a portion of the antenna is extended through the insulating layer and the molding to electrically connect with the transceiver.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.