Systems and methods for parallelizing and pipelining a tunable blind source separation filter
US9954561B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Sep 12, 2016 |
| Grant date | Apr 24, 2018 |
| Priority date | — |
| Expiry date | Sep 12, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03H2021/0034
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A method of processing a plurality of time-varying signals received at a sensor communicatively coupled to a signal data processor to identify at least one parameter of at least one of the plurality of time-varying signals is provided. The method includes receiving, at a plurality of blind source separation (BSS) modules of the signal data processor, signals derived from the plurality of time-varying signals, each BSS module of the plurality of BSS modules including a filtering subsystem having a pipelined architecture and a parallelized architecture. The method also includes generating a plurality of blind source separated signals, and transmitting at least one pulse descriptor word (PDW) parameter vector signal to a computing device of the signal data processor. The method further includes identifying the at least one parameter from the at least one PDW parameter vector signal, and outputting the at least one parameter from the signal data processor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.