Systems and methods to separate power domains in a processing device
US9958918B2 · kind B2 · utility
0Cited by
7References
22Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 23, 2016 |
| Grant date | May 1, 2018 |
| Priority date | — |
| Expiry date | Sep 9, 2036 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor device includes: a processing core having a plurality of sub cores, a plurality of power rails spanning from a first sub core to a second sub core of the plurality of sub cores, the plurality of power rails configured to provide an operating voltage to each of the first sub core and the second sub core, and a plurality of cells defining a boundary between the first sub core and the second sub core, each of the cells providing a discontinuity in a respective power rail, wherein the discontinuity includes a break in the respective power rail in more than one layer of the semiconductor device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.