Embedded spin transfer torque memory for cellular neural network based processing unit
US9959500B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 5, 2017 |
| Grant date | May 1, 2018 |
| Priority date | — |
| Expiry date | Jul 5, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L23/5329
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An integrated circuit processor having a processing unit that includes a logical circuit with multiple transistors and a top metal landing pad, and an embedded STT memory. The STT memory includes a dielectric layer formed on the top metal landing pad, an adhesion and topography planarization (ATP) layer formed on the dielectric layer, and an MTJ film layer disposed on the ATP layer. The memory may also include bit lines formed on the MTJ film layer. The ATP layer may have multiple layers such as a top layer and a bottom layer. The top layer may act as an etch stop for etching the MTJ film layer on the top. The ATP layer may have a total thickness of 500 A to 4000 A. The bit lines can be configured to send data to the logic circuit of the processing unit to perform one or more convolution neural network computations.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.