Three-dimensional semiconductor memory device and method of fabricating the same
US9960182B2 · kind B2 · utility
2Cited by
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11Claims
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Key dates
| Filing date | Jun 27, 2017 |
| Grant date | May 1, 2018 |
| Priority date | — |
| Expiry date | Jun 27, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B43/35
Abstract
A semiconductor memory device includes a stack including gate electrodes sequentially stacked on a substrate, a vertical insulating structure penetrating the stack vertically with respect to the gate electrodes, a vertical channel portion disposed on an inner side surface of the vertical insulating structure, and a common source region formed in the substrate and spaced apart from the vertical channel portion. A bottom region of the vertical channel portion has a protruding surface in contact with a bottom region of the vertical insulating structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.