Accommodating engineering change orders in integrated circuit design
US9965576B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 21, 2017 |
| Grant date | May 8, 2018 |
| Priority date | — |
| Expiry date | Jul 21, 2037 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02P90/02
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method includes receiving a register-transfer-level description and a gate-level description for an integrated circuit design. The gate-level description includes one or more spare latches implemented as reconfigurable latch filler cells. The method further includes receiving an engineering change order, and, responsive to the engineering change order, adding the at least one additional latch to the register-transfer-level description and, for at least one of the at least one additional latch, selecting one of the one or more spare latches in the register-transfer-level description to yield a selected spare latch. The method further includes, for the selected spare latch, identifying a selected reconfigurable latch filler cell in the gate-level description and replacing the selected reconfigurable latch filler cell with an operational latch in the gate-level description. The method further includes finalizing the integrated circuit design. A corresponding computer program product and computer systems are also disclosed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.