Pixel compensation circuit, method and flat display device
US9966005B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Feb 25, 2016 |
| Grant date | May 8, 2018 |
| Priority date | — |
| Expiry date | Aug 30, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2320/045
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
Pixel compensation circuit, method and flat display device. The circuit includes control terminals of first to fourth controllable and driving switches respectively connected with first to fourth scanning lines and second terminal of the second controllable switch, first terminal of the first controllable switch connected with data line; first terminal of the second controllable switch connected with second terminal of the first controllable switch; first terminal of the third controllable switch connected with the second terminal of the first controllable switch; the second terminal of the first controllable switch is connected with the second terminal of the driving switch through a storage capacitor; anode of an OLED connected with the second terminal of the driving switch, cathode is grounded; first terminal of the fourth controllable switch connected with second voltage terminal, which can avoid unstable current of the organic light emitting diode by drift of threshold voltage of driving transistor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.