Method and noise suppression circuit incorporating a plurality of noise suppression techniques
US9966085B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 21, 2007 |
| Grant date | May 8, 2018 |
| Priority date | — |
| Expiry date | Dec 18, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG10L21/0232
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A noise suppression circuit for use in an audio signal processing circuit is provided. The noise suppression circuit includes a plurality of different types of noise activity detectors, which are each adapted for detecting the presence of a different type of noise in a received signal. The noise suppression circuit further includes a plurality of different types of noise reduction circuits, which are each adapted for removing a different type of detected noise, where each noise reduction circuit respectively corresponds to one of the plurality of noise activity detectors. The respective noise reduction circuit is then selectively activated to condition the received signal to reduce the amount of the detected types of noise, when each one of the plurality of noise activity detectors detects the presence of a corresponding type of noise in the received signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.