Semiconductor memory device having first and second floating gates of different polarity

US9966476B2 · kind B2 · utility

Assignee

• SII Semiconductor Corporation · JP

Inventor

• Tomomitsu Risaki · Chiba, JP

Key dates

• Filing date: May 4, 2016
• Grant date: May 8, 2018
• Expiry date: Jun 10, 2036

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D64/685

Abstract

A semiconductor memory device includes a first floating gate and a second floating gate of conductivity types with different polarities. Injection of electrons into the first floating gate via a tunnel insulating film is stored through a decrease in holes in a valence band of the second floating gate, and ejection of electrons from the first floating gate via the tunnel insulating film is stored through an increase in holes in the valence band of the second floating gate.