Systems and methods for reducing standby power consumption of switch-mode power converters
US9966860B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 22, 2014 |
| Grant date | May 8, 2018 |
| Priority date | — |
| Expiry date | Oct 22, 2034 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02B70/10
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
Power conversion system and method. The system includes a first capacitor including a first capacitor terminal and a second capacitor terminal, a second capacitor including a third capacitor terminal and a fourth capacitor terminal, and a plurality of diodes including a first diode, a second diode, a third diode, and a fourth diode. The first diode is coupled to the second diode at a first node, the second diode is coupled to the fourth diode at a second node, the fourth diode is coupled to the third diode at a third node, and the third diode is coupled to the first diode at a fourth node. Additionally, the system includes a fifth diode including a first anode and a first cathode and a sixth diode including a second anode and a second cathode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.