Patent · US Active

Method to assess energy efficiency of HPC system operated with and without power constraints

US9971391B2 · kind B2 · utility

2Cited by
1References
22Claims
0Family size

Assignee

Inventors

Key dates

Filing dateDec 23, 2015
Grant dateMay 15, 2018
Priority date
Expiry dateMay 22, 2036

Classification

  • Technology area (CPC Y)Emerging Cross-Sectional Technologies
  • CPC primaryY02D10/00
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A method of assessing energy efficiency of a High-performance computing (HPC) system, including: selecting a plurality of HPC workloads to run on a system under test (SUT) with one or more power constraints, wherein the SUT includes a plurality of HPC nodes in the HPC system, executing the plurality of HPC workloads on the SUT, and generating a benchmark metric for the SUT based on a baseline configuration for each selected HPC workload and a plurality of measured performance per power values for each executed workload at each selected power constraint is shown.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.