Causing an interrupt based on event count
US9971603B2 · kind B2 · utility
4Cited by
10References
20Claims
0Family size
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Key dates
| Filing date | Feb 21, 2017 |
| Grant date | May 15, 2018 |
| Priority date | — |
| Expiry date | Feb 21, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2201/88
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Some implementations provide techniques and arrangements for causing an interrupt in a processor in response to an occurrence of a number of events. A first event counter counts the occurrences of a type of event within the processor and outputs a signal to activate a second event counter in response to reaching a first predefined count. The second event counter counts the occurrences of the type of event within the processor and causes an interrupt of the processor in response to reaching a second predefined count.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.