Self-configurable device for interleaving/deinterleaving data frames
US9971684B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Feb 22, 2013 |
| Grant date | May 15, 2018 |
| Priority date | — |
| Expiry date | Feb 22, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M13/1102
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A device for interleaving/deinterleaving digital data delivered by processing elements (P0 . . . Pn-1) suitable for being used both with turbo-codes and with LDPC codes. The device includes memory banks (B0 . . . Bm-1) for storing data coming from or going to the processing elements, an interconnection network (INT) for directing the data between the processing elements and the memory banks, and a control unit (CTRL) for controlling the interconnection network and the memory banks. The control unit (CTRL) includes a calculation circuit (CAL) capable of the online generation of command words for the interconnection network and addressing and control sequences of the memory banks, ensuring conflict-free memory access on the basis of the interleaving rule to be applied, the size of the digital data frames, the number of processing units and memory banks, and the interconnection network.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.