Semiconductor device and method of manufacturing same
US9972713B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 6, 2015 |
| Grant date | May 15, 2018 |
| Priority date | — |
| Expiry date | May 6, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/517
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
To provide a semiconductor device including a power semiconductor element having improved reliability. The semiconductor device has a cell region and a peripheral region formed outside the cell region. The n type impurity concentration of n type column regions in the cell region is made higher than that of n type column regions comprised of an epitaxial layer in the peripheral region. Further, a charge balance is kept in each of the cell region and the peripheral region and each total electric charge is set so that a total electric charge of first p type column regions and a total electric charge of n type column regions in the cell region become larger than a total electric charge of third p type column regions and n type column regions comprised of an epitaxial layer in the peripheral region, respectively.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.