Doherty architecture for wideband power amplifier design
US9973150B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 28, 2017 |
| Grant date | May 15, 2018 |
| Priority date | — |
| Expiry date | Jun 28, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2203/21139
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Embodiments of a Doherty amplifier device are provided, where the device includes a main amplifier that produces a first RF signal with a variable first output power and a peaking amplifier that produces a second RF signal with a variable second output power equivalent to the first output power multiplied by a power ratio n greater than one; first and second RF signals combined in phase at a combining node; and a main output matching network (OMN), wherein the main OMN forms a portion of an equivalent main path transmission line having a characteristic impedance equivalent to (n+1)·√{square root over (Ropt·R0)}, wherein Ropt is a load impedance seen at the main amplifier intrinsic current generator plane during a full power condition of the Doherty amplifier device and (n+1)·R0 is a load impedance seen at the combining node during a back-off power condition of the Doherty amplifier device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.