Power amplifier output power control circuit
US9973164B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 25, 2017 |
| Grant date | May 15, 2018 |
| Priority date | — |
| Expiry date | Dec 25, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2200/462
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A power amplifier output power control circuit includes a first operational amplifier with a negative input terminal configured to receive a power control signal; a first PMOS transistor with a grid electrode connected to an output terminal of the first operational amplifier, a source electrode connected to an external power source, and a drain electrode grounded via a voltage dividing network; a power amplifier with a power end connected to the drain electrode of the first PMOS transistor, an input terminal configured to access to a signal to be amplified, and an output terminal configured to amplify the signal; and a current sampling circuit configured to produce sampling current after sampling current across the first PMOS transistor and providing a negative feedback signal for the positive input terminal of the first operational amplifier according to the sampling current such that total output power of the power amplifier keeps unchanged.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.