Circuit, integrated circuit, receiver, transceiver and method for receiving a signal
US9974024B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 22, 2016 |
| Grant date | May 15, 2018 |
| Priority date | — |
| Expiry date | Mar 22, 2036 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D30/70
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A circuit according to an example includes a receiver circuit configured to receive a signal including a data stream, the data stream including at least one block of data, a block of the at least one block of data including at least two sub-blocks, a payload of the block being redundantly encoded in the at least two sub-blocks, and the at least two sub-blocks of the block being consistently arranged over time inside the block. The circuit further includes a control circuit configured to switch the receiver circuit into a non-ready-to-receive state during at least a part of at least one of the at least two sub-blocks of the block, when an enable condition is fulfilled.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.