Negative capacitance field effect transistor with charged dielectric material
US9978868B2 · kind B2 · utility
27Cited by
6References
20Claims
0Family size
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Key dates
| Filing date | Nov 16, 2015 |
| Grant date | May 22, 2018 |
| Priority date | — |
| Expiry date | Nov 16, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/689
Abstract
The present disclosure provides a semiconductor device in accordance with some embodiments. The semiconductor device includes a substrate; a gate stack over the substrate. The gate stack includes a ferroelectric layer; a first dielectric material layer; and a first conductive layer. One of the first dielectric material layer and the ferroelectric layer is electrically charged to form a charged layer with fixed charge. The semiconductor device further includes source and drain features formed on the substrate and disposed on sides of the gate stack.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.