Patent · US Active

Integrated delay modules

US9979374B2 · kind B2 · utility

3Cited by

165References

19Claims

0Family size

Assignee

Kumu Networks, Inc. · US

Inventors

Wilhelm Steffen Hahn · Schonach, DE
Alfred Riddle · Sunnyvale, US
Ernie Landi · Sunnyvale, US

Key dates

Filing date	Apr 25, 2017
Grant date	May 22, 2018
Priority date	—
Expiry date	Apr 25, 2037

Classification

Technology area (CPC H)Electricity
CPC primaryH03H7/0115
WIPO fieldBasic communication processes
WIPO sectorElectrical engineering

Abstract

An analog time delay filter circuit including a first delay circuit block arranged in a modular layout, having a first time delay filter, a first input, a first output, and first and second pass-throughs; a second delay circuit block arranged in the same modular layout, having a second time delay filter, a second input, a second output, and third and fourth pass-throughs; and an interposer circuit block that electrically couples the second input to the first pass-through and the second output to the second pass-through.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.