Pulse-generator
US9979394B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 16, 2016 |
| Grant date | May 22, 2018 |
| Priority date | — |
| Expiry date | Feb 16, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K5/04
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
The apparatus may include a first latch configured to store a first state or a second state. The first latch may have a first latch input, one of a set input or a reset input, a first pulse clock input, and a first latch output. The first latch input may be coupled to a fixed logic value. The one of the set input or the reset input may be coupled to a clock signal or an inverted clock signal, respectively. The apparatus may include an AND gate having a first AND gate input, a second AND gate input, and a first AND gate output. The clock signal may be coupled to the first AND gate input. The first latch output may be coupled to the second AND gate input. The AND gate output may be configured to output a pulsed clock. The pulsed clock may be coupled to the first pulse clock input.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.