Method and processor for implementing thread and recording medium thereof
US9983910B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | May 4, 2016 |
| Grant date | May 29, 2018 |
| Priority date | — |
| Expiry date | Sep 3, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/4881
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A processor and corresponding method are described including cores having a thread set allocated based on a pre-set implementation order, and a controller configured to receive scheduling information determined based on an implementation pattern regarding the allocated thread set from one of the cores and transmit the scheduling information to another of the cores. The one of cores determines the scheduling information according to characteristics of an application when implementation of the thread set is completed. Each of the cores re-determines an implementation order regarding the allocated thread set based on the determined scheduling information.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.