Method of fabricating a semiconductor package
US9985008B2 · kind B2 · utility
3Cited by
2References
16Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 3, 2017 |
| Grant date | May 29, 2018 |
| Priority date | — |
| Expiry date | Feb 3, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/18161
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of fabricating a semiconductor package includes providing a lower semiconductor package including a lower package substrate, and a lower dummy ball and a lower solder ball on a top surface of the lower package substrate, providing an upper semiconductor package including an upper package substrate, and an upper dummy ball and an upper solder ball on a bottom surface of the upper package substrate, joining the upper dummy ball to the lower dummy ball at a first temperature to form a solder joint, and joining the upper solder ball to the lower solder ball at a second temperature to form a connection terminal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.