Digital pixel exposure method by using multiple ramp voltage as reference voltage
US9986181B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 12, 2014 |
| Grant date | May 29, 2018 |
| Priority date | — |
| Expiry date | Dec 12, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N25/65
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
The present invention relates to a CMOS image sensor. The present invention provides a digital pixel sensor capable of maintaining consistency between two reference voltage changing rates. To this end, the invention proposes a technical solution in which a digital pixel exposure method by using multiple ramp voltage as reference voltage is provided. Said method includes the following steps: by means of PWM pixel array, a PWM pixel is composed of a photodiode PD, a reset transistor MRST, a pixel or column level comparator, and a pixel or column or array level memory; the two input ends of the pixel level comparator are connected with PD node voltage and a predefined reference voltage Vref; after being reset, the PWM type digital pixel undergoes an exposure period; the exposure time includes a reset sampling period Trs and an integration sampling period Tis; in resetting sampling period, reference voltage Vref linearly rises from Vref_rsl to Vref_rsh; The integration sampling period is divided into several sub periods. The present invention mainly applies to design and manufacture of CMOS image sensors.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.