System and method for efficient address translation of flash memory device
US9990277B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 11, 2014 |
| Grant date | Jun 5, 2018 |
| Priority date | — |
| Expiry date | Mar 29, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/7201
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Disclosed are a system and a method for address translation for a flash memory device, and particularly, disclosed is a technology that is capable of efficiently performing address translation between a logical address provided to the outside of a flash memory and a physical address of an actual flash memory in managing the flash memory device. The system includes: a flash memory system writing a corresponding data page by allocating a physical address space when there is a request for writing a data page from storage clients, and performing address translation between a physical address and a logical address; and a logical address space formed between the flash memory system and the storage client to provide the logical address.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.