Efficient display processing with pre-fetching
US9990690B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 21, 2015 |
| Grant date | Jun 5, 2018 |
| Priority date | — |
| Expiry date | Nov 3, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2360/18
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
In an example, a method for tile-based processing by a display processor may include reading first foreground tile data of a foreground image from a first memory space. The method may include storing the read first foreground tile data into a second memory space. The method may include reading first background tile data of a background image from the first memory space. The method may include storing the read first background tile data into a third memory space. The method may include reading a subset of data of the first foreground tile data from the second memory space. The method may include reading a subset of data of the first background tile data from the third memory space.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.