Contact MEMS architecture for improved cycle count and hot-switching and ESD
US9991065B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 30, 2016 |
| Grant date | Jun 5, 2018 |
| Priority date | — |
| Expiry date | Oct 5, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04B1/44
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
The disclosure is directed to optimized switching circuitry utilizing MEMS (Microelectromechanical Systems) circuitry in series with solid state circuitry. Specifically, the MEMS circuitry includes a first MEMS circuit in parallel with (and separate from) a second MEMS circuit. A paired signal is defined as a transmit signal and a receive signal (in a single band) that are transmitted or received on separate paths or on separate nodes. The transmit signal is associated with the first MEMS circuit, and the receive signal is associated with the second MEMS circuit. The solid state circuitry switches between the first MEMS circuit and second MEMS circuit without requiring any switching in the first or second MEMS circuits.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.