Patent · US Active

Package substrate and manufacturing method thereof and package

US9991222B2 · kind B2 · utility

2Cited by
0References
10Claims
0Family size

Assignee

Inventor

Key dates

Filing dateApr 18, 2017
Grant dateJun 5, 2018
Priority date—
Expiry dateApr 18, 2037

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L2924/19106
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

A package substrate including a carrier, a first patterned conductive layer, a second patterned conductive layer and a 3D-printing conductive wire is provided. The carrier has a first surface, a second surface and a third surface. The first surface is opposite to the second surface, and the third surface is connected between the first surface and the second surface. The first patterned conductive layer is disposed on the first surface. The second patterned conductive layer is disposed on the second surface. The 3D-printing conductive wire is disposed on the third surface and connected between the first patterned conductive layer and the second patterned conductive layer.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.